1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor substrate. This invention is preferably adopted as a method of manufacturing a substrate of group III nitride compound semiconductor such as GaN.
The present application is based on Japanese Patent Application No. Hei. 11-368752, which is incorporated herein by reference.
2. Description of the Related Art
Traditionally, a substrate of a single crystal which cannot be used, as it is, as a substrate crystal has been formed in such a manner that crystal growth is made, directly or through various buffer layers, on a material (base material or substrate) having relatively similar characteristics in terms of the melting point, thermal expansion coefficient, lattice constant, etc., and thereafter the substrate is removed by grinding.
JP-A-7-202265 discloses a technique in which an intermediate layer located between a sapphire substrate and an GaN layer is dissolved and removed in a manner being immersed in an etchant at 60xc2x0 C. after the GaN layer has been formed.
However, occasionally, the thermal expansion coefficient of the base material is different from that of the crystal grown thereon. This produces a warp or crack due to thermal distortion in a process of cooling from the crystal growth temperature at a high temperature to room temperature so that the single crystal substrate with high quality cannot be formed.
As for GaN, traditionally, after the GaN was grown on a substrate of sapphire at about 1000xc2x0 C., the temperature was lowered to room temperature and the substrate thus formed was taken out from a reacting chamber. Now, the thermal expansion coefficients of sapphire and GaN are 7.5xc3x9710xe2x88x926 and 5.59xc3x9710xe2x88x926, respectively. Such a difference in the thermal expansion coefficient may produce a warp and further crack 3 when thick GaN 2 is epitaxially grown on the substrate 1 as shown in FIG. 1. Since the thermal expansion coefficient of the substrate is larger than that of GaN, contractive distortion is applied to GaN. Thus, lowering the temperature of a sample exerts an adverse effect on the crystallinity of the GaN.
It is difficult to acquire the substrate of GaN by removing the substrate from the warped sample through grinding. Even if this substrate is acquired, it could not have good quality since it has been subjected to stress during temperature lowering.
This invention has been accomplished in order to obviate the disadvantages described above.
In accordance with the first aspect of this invention, there is provided a method of manufacturing a semiconductor substrate comprising:
forming a semiconductor layer on a first layer through a second layer in a first environment; and
separating the semiconductor layer in a second environment which is different from the first environment, the second environment lowering a coupling force of the second layer for at least one of the first layer and the semiconductor layer, or after having undergone the second environment, wherein distortion is not substantially applied to the semiconductor layer owing to a difference between itself and the first layer in their thermal expansion coefficient.
In accordance with the method of manufacturing a semiconductor substrate of this invention, since the coupling force of the second layer located between the semiconductor layer and the first layer which is a substrate has been reduced in the second environment, the semiconductor layer can be easily separated from a sample. Further, for the time from the first environment to the second environment, preferably until the semiconductor layer is separated after it has been formed, distortion is not substantially applied to the semiconductor layer owing to a difference in the thermal expansion coefficient. Therefore, the crystallinity of the semiconductor layer during the crystal growth is kept at the worst. Thus, the semiconductor substrate with good quality can be easily acquired.
Where the second layer that has once experienced the second environment does not restore the coupling force for at least one of the first layer and semiconductor layer regardless of the subsequent environment, i.e. where the coupling force of the second layer for at least one of the first layer and semiconductor layer which has been once reduced or become zero is kept, it is not necessary to separate the semiconductor layer in the second environment.
The materials of the first layer which is a substrate and second layer which is an intermediate layer may be optionally selected in accordance with the semiconductor to be grown.
Where the semiconductor to be grown is Group III nitride compound semiconductor such as GaN, the material of the substrate may be sapphire, spinel, silicon, silicon carbide, zinc oxide, gallium phosphide, gallium arsenide, magnesium oxide, manganese oxide, etc.
According to the investigation by the inventors of this invention, preferably, the substrate is made of sapphire and the plane a is used.
The second layer which is an intermediate layer is made of a material having reduced coupling force for at least one of the first layer and the semiconductor layer. In order to isolate the semiconductor layer, the coupling force of the second layer for the semiconductor layer is preferably reduced.
Where the first environment where the semiconductor layer is grown and the second environment where the second layer is made fragile are different in their physical environmental conditions, particularly the temperature conditions, as the material of the second layer, metal whose melting point is higher than the growth temperature of the semiconductor layer (temperature of the first environment) and not higher than the temperature of the second environment is selected. Such a metal may be Ti, Ni, Y, Be, Mn, Au, Ag, Cu and their alloy. On the other hand, where the first environment and the second environment are different in their chemical conditions, i.e. the second layer is chemically resolved or dissolved in the second environment, the material of the second layer may be ZnO, etc.
These layers are formed by known techniques such as vacuum deposition and sputtering. The thickness of the second layer is not limited particularly. For example, it may be 10-10000 nm, preferably 100-5000 nm.
It is not required that the second layer is formed on the entire first layer. For example, when Group III nitride compound semiconductor is grown by the lateral growth technique (ELO method: epitaxial lateral over growth) as disclosed in JP-A-10-312971, the second layer is formed on the first layer which is exposed among growth inhibiting materials.
The material of the semiconductor layer is not particularly limited as long as it is required as a single crystal substrate. Preferably, the semiconductor may be made of the Group III nitride compound semiconductor. Now, the Group III nitride compound semiconductor can be represented by a general formulas AlXGaYIn1-X-YN (0xe2x89xa6Xxe2x89xa61, 0xe2x89xa6Yxe2x89xa61, 0xe2x89xa6X+Yxe2x89xa61), and it includes a xe2x80x9cbinary systemxe2x80x9d of AlN, GaN and InN and a xe2x80x9cternary systemxe2x80x9d of AlXGa1-XN, AlXIn1-XN and GaXIn1-XN (0xe2x89xa6Xxe2x89xa61) Boron (B), thallium (Tl), etc may be substituted for apart of the Group III element. Phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc may be substituted for a part of nitrogen (N).
The Group III nitride compound semiconductor layer may contain any dopant. An n-type impurity may be Si, Ge, Se, Te, C, etc. A p-type impurity may be Mg, Zn, Be, Ca, Sr, Ba, etc. The Group III nitride compound semiconductor, after having been doped with the p-type impurity, may be exposed to electron beam radiation, plasma radiation or furnace heating.
The method of forming the Group III nitride compound semiconductor layer is not particularly limited. The Group III nitride compound semiconductor layer may be formed by not only an organic metal chemical vapor deposition (MOCVD) but also the molecular beam crystal growth (MBE), halide vapor growth (HVPE), sputtering, ion-plating, electron shower, etc. A buffer layer may be preferably formed between the second layer and the semiconductor layer.
Since the semiconductor layer, after having been separated, is used, it must have a certain film thickness. Generally, the substrate is required to have a film thickness of 100xcexc or more.
In order to prevent the distortion due to the thermal expansion coefficient from being applied to the semiconductor layer, the first environment, i.e. the temperature of the growth of the semiconductor layer and the temperature of the second environment are made equal to each other. According to the investigation by the inventors of this invention, if the temperature difference between the first environment and the second environment is within 50% in terms of the absolute temperature of the former, the distortion is not substantially applied to the semiconductor layer. Preferably, it is within 30%, and more preferably it is within 20%.
The method for separating the semiconductor layer is not particularly limited. In a state where the coupling force of the second layer has been reduced, loads in opposite directions are applied to the first layer which is a substrate and the semiconductor layer so that they are sheared from each other. Otherwise, they are cut at the second layer using a knife. In some cases, thermal distortion when the sample is cooled may be concentrated on the second layer so that they are automatically separated from each other at the second layer.
As long as the coupling force of the second layer for the semiconductor layer has been reduced, the semiconductor layer can be isolated during the separating. Where the coupling force of the second layer has been reduced for the first layer which is the substrate, the second layer is deposited on the semiconductor layer.
The semiconductor layer thus separated can be applied as a semiconductor substrate to various semiconductor elements. These semiconductor elements include not only an optical element such as a light emitting diode, a light receiving diode, a laser diode, a solar cell, etc. but also a bipolar element such as a rectifier, a thyristor, a transistor, etc. a unipolar element such as an FET and an electronic device such as a microwave element. This invention may be also applied to a laminate which is an intermediate of these elements.
Incidentally, the light emitting element may have a homo-structure, a hetero-structure or double-hetero-structure including an MIS junction, PIN junction or pn junction. The light emitting layer may have a quantum well structure (single quantum well structure or multi-quantum well structure).
The inventors of this invention proposes the following invention according to the second aspect.
A method of manufacturing a semiconductor substrate comprising;
forming a semiconductor layer on a first layer through a second layer, and
separating the semiconductor layer, thereby forming the semiconductor substrate inclusive of the semiconductor layer, wherein the second layer is composed of a distortion absorbing layer having a first melting point and an underlying layer having a second melting point, higher than the first melting point, the distortion absorbing layer being in a dissolved state at a temperature of an environment where the semiconductor layer is formed.
In accordance with the invention according to the second aspect, the second layer which is an intermediate layer is composed of a distortion absorbing layer and an underlying layer. The distortion absorbing layer is in a dissolved state at a temperature of growing the semiconductor layer, i.e. the first environment, and hence has substantially zero coupling force for the first layer. However, this does not affect the growth of the semiconductor layer since the underlying layer is made of a refractory material (having a higher melting point than the semiconductor growth temperature).
However, from the standpoint of view of using the crystal structure of the first layer which is the substrate, it is preferred that the semiconductor layer is initially grown at the temperature lower than the melting point of the distortion absorbing layer and thereafter the temperature is raised to dissolve the distortion absorbing layer. In this case, the first layer and the semiconductor layer are separated from each other before the distortion absorbing layer is solidified. Further, even when the semiconductor layer is not separated, the distortion absorbing layer is in a dissolved state for a short while during temperature lowering. Therefore, the distortion stress due to the difference between the first layer and the semiconductor layer in their thermal expansion coefficients is relaxed at this time. Thus, the warp or crack is not generated in the semiconductor layer. After cooling, if the temperature of the sample is raised by a hot plate or the like, the distortion absorbing layer is fallen in the dissolved state again. Therefore, the first layer and the second layer can be easily separated.
When the distortion absorbing layer is separated in this way, the underlying layer is deposited on the semiconductor layer. For this reason, it is desired that the underlying layer is made thin so that where there is a difference between itself and the semiconductor layer, the crack is generated preferentially in this underlying layer.